Physical ASIC Design Implementation Engineer

Functie

What you will do

For more than ⚠ years, SG Link has been offering an ASIC prototyping and production service to worldwide companies. SG Link helps its customers to design their integrated circuits (chips) and bring them from the prototype to the production stage. Our list of customers includes more than ⚠ universities and companies worldwide. For the further extension of the physical digital implementation group (Back-End group) in SG Link. IC-link, we are looking for a highly motivated engineer. 🔗, as part of SG Link, has an extensive industrial experience, contacts with leading industrial foundries, and long-standing relationships with all the main EDA tool vendors and IP providers. This unit supports worldwide customers in the layout, prototype, fabrication and test of advanced electronic products.

As ASIC design engineer within SG Link. IC-link, you will be in direct contact with our customers for future projects. You will have full understanding of the complete Cadence Innovus Place&Route flow:

  • Set up low power design (CPF)
  • Floor planning & power grid design
  • Detailed Timing Driven Placement
  • STA & possible design optimisation for setup
  • Clock Tree Synthesis
  • Scan chain re-stitching
  • Detailed Timing Driven Route (incl. SI)
  • IPOs (in-place optimization) to get the timing in all corners correct
  • Solve setup & hold violations
  • Sign-off extraction (SPEF)
  • Sign-off timing (TEMPUS)
  • Sign-off Power analysis (VOLTUS)
  • Physical verification (DRC, ERC, LVS, ANT)
  • Logic equivalent check

For hierarchical designs, you can take the lead for partitioning and split the top level SDC file into timing, budget, requirements/constraints of the sub-blocks. You will work directly with the Physical Design implementation team during the entire chip design cycle to drive signoff closure for tape-out, You are also the technical voice to the customer to discuss his specifications.

Jouw profiel

Who you are

  • You have a Master Degree in Electronics
  • You have at least ⚠ years of experience in physical implementation in advanced nodes (⚠ – ⚠nm) and hierarchical designs.
  • You have experience in power reduction techniques like gated clocks, voltage domains, memory retention and switch off power domains.
  • You have excellent communication skills (English is a must) and can work within an international team.
  • You like to interact with customers.
  • Testen uitvoeren
    De resultaten analyseren
    Het product en proces op punt stellen
  • De uitvoerbaarheid van het project bestuderen
    Technische en technologische voorstellen uitwerken
  • Technische dossiers voor de beschrijving van het project opstellen en aanpassen
  • Verschillende diensten en klanten technisch bijstaan
  • De methodes en middelen voor studies en ontwerp en hun uitvoering bepalen
  • Wetenschappelijke, technologische, technische, reglementaire, … informatie opvolgen en actualiseren
  • Oplossingen en technische en technologische evoluties ontwikkelen
    De kenmerken en eisen van het project bestuderen

Aanbod

What we do for you

We offer you the opportunity to join one of the world's premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you'll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through 🔗, 'our corporate university', we actively invest in your development to further your technical and personal growth.

We are aware that your valuable contribution makes SG Link a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits.

Solliciteren

Kristen Dautenhahn
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